Memory technologies of the future - where to from here?

As the computer industry advances, new memory technologies play a key role in system performance. Revolutionary, as well as evolutionary types of memory are beginning to emerge. Ian Rayner, Kingston product manager at AXiZ, discusses these changes.

RAMBUS

Rambus is a revolutionary memory technology. By not being backward compatible, consumers cannot upgrade their existing computers to use Rambus technology or RIMMS. The definition of RIMM is not an acronym for Rambus In-line Memory Module. It is simply a term that is used to describe the Rambus memory module.

Rambus works by transferring data on both the leading and trailing edge of the clock cycle. The clock runs at the high speed of 400MHz. With two operations per clock cycle, the data is transferred at a speed of 800MHz. The 16-bit wide Rambus channel (2 bytes wide) lets the data transfer at a rate of up to 1.6 GB per second.

"Rambus uses transmission line technology, which enables the signal to enter one side of the module, access the RDRAM, exit the other side and travel through the next memory connector," says Rayner. "Because of this, each connector must be populated. If only one connector is populated with a module, a C-RIMM should populate the empty connector."

A C-RIMM or Continuity RIMM does not have RDRAM on it. A C-RIMM allows the signal to pass through the connector to let the data flow uninterrupted. When the system is upgraded, the C-RIMM will be replaced with a module. With the release of the Intel 820 (single RIMM channel) and 840 (dual RIMM channel) chipsets and motherboards, Rambus technology has become a reality in the computing industry.

PC133

PC133 SDRAM is an evolutionary memory technology. Like the existing PC100, which runs at a memory bus speed of 100MHz, PC133 will work at a memory bus speed of 133MHz.

DDR

Double-Data-Rate (DDR) SDRAM, often simply called DDR, is another evolutionary SDRAM memory technology. DDR allows for two transactions in one clock cycle, compared to one for PC100 or PC133 SDRAMs.

This allows data to be transferred on both the rising and falling edges of the clock signal. The initial DDR module specifications, expected to be finalized by JEDEC in 2000, define 100- and 133-MHz DDR DIMM modules, resulting in an effective data rate of 200- and 266- MHz respectively.

The 200-MHz data rate DDR DIMM is expected to be introduced first, followed by the 266-MHz DDR DIMM later on. Faster DDR DIMMs are also under discussion. DDR is expected to be introduced first in the server market, and then in the desktop market.