Sun Microsystems predicts that all computer chip manufacturers will eventually embrace multithreading and says it has all the elements to make that environment a reality.
"From the processor design to the capable operating system, we have all the ingredients to make it work," says David Yen, Sun executive VP of processor and network products. "Competitors are missing at least one of the pieces, such as control of an operating system that is capable of handling multithreading."
On a visit to SA from Sun headquarters in the US, Yen told journalists at Gallagher Estate in Midrand that due to an early start, Sun is in the lead regarding chip multithreading (CMT) technology. "We are actively pursuing this new vision and have CMT projects not only in the low-end networking space, but also in the mid-range and high-end."
Yen explains that chip multithreading sits at the heart of a new computing paradigm known as "throughput computing", in which the computing environment is full of threads or tasks waiting to be executed. "You can make one processor core capable of supporting multiple threads, effectively transforming a processor into a nearly 100% productive engine."
Yen says if such a processor is combined with a hardware platform designed to supply all the necessary bandwidth to feed such a hungry processor and an operating system such as Solaris that is thread-friendly, a hitherto unknown computing capacity can be achieved.
Yen says Sun has been working for the past couple of years to make the vision of multithreading chips a reality and last year acquired a company called Afara Web Systems to expedite product development.
"Niagra will be Sun's first chip based on true CMT technology. It will have eight processor cores, with each core capable of executing four software threads. So you will have one chip literally executing 32 threads." Yen says a system based on such a processor chip is expected to be released early in 2006.
In the meantime, Sun's two-core UltraSparc IV is to be released in the first quarter of next year. "Each UltraSparc IV processor will have two UltraSparc III cores inside each silicon chip."
However, Yen points out that these chips together with Intel's hyper-threading Xeon chips and IBM's two-core Power4 and Power5 chips represent a transition phase. He says they cannot be considered to be the real first generation of CMT because they are full of traditional memory latency combating mechanisms and there is nothing really new from an architectural point of view.
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