The Pentium Four (P4) is built on an entirely new Netburst microarchitectural platform, Intel`s first since the P6 hit the streets in 1995. Doug Carmean, principal architect, Intel architecture group, highlights the features of this Netburst marchitecture that will boost performance for the latest high-end desktop platform.
The Intel team concentrated on processing more instructions per clock cycle to really speed up the P4, including improving efficiency and reducing latency. Efficiency is particularly improved through better branch prediction.
The branch prediction is eight times the size of the P6 marchitecture, resulting in one-third of the mispredictions. A new algorithm also helps raise the prediction percentage chance. Latency is reduced through a lower arithmetic logic unit (ALU) latency, which now takes half a clock cycle.
Of the new features, the rapid execution engine (REE) is the "heart of the Netburst architecture", according to Carmean. "Wrapped around the REE is the advanced dynamic execution trace cache." These features are boosted by the advanced transfer cache, which sports a significant bandwidth increase over the PIII. "To round it all off you get a 400MHz system bus," adds Carmean.
In addition to new features, Intel has improved some of the existing technology, including 144 new instructions for the SIMD 2 instruction set. These revolve around graphics, multimedia and encryption algorithms.
The L1 cache size has dropped from 16kb to 8kb between the P6 and the Netburst, while the speed has been more than doubled, from 3ns to less than 1.4ns. Carmean says Intel believes the P4 will benefit more from lower latency than a larger cache.
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